My SRAM tester is finally done!I've finished a project!
This is an important milestone :)
This is probably of more importance to me than anyone else, but I still thought it might be worth writing about, since I've already posted about building this thing...
Now I can test TC5514APL-3 ICs :)
It should also work for uPD444C, M58981P and HM4334P since they're the same thing, but I don't have any of those.
A small step for mankind...but a giant step for me.
The project lay dormant, as all of my projects, for too long.
However, last night I decided to try and finish it.
I completed the final details, and then with the help of a cheap logic analyzer I fixed the last bugs.
So, tonight I finally managed to test my chips :)
(they all worked, btw, according to my tester at least, hehe)
Quick info about TC5514APL-3
The TC5514APL-3 is a 1kx4-bit memory, so it's got a databus of 4 bits and address range 0-1023, for an astonishing total of 4096 bits! Laughable by today's standards of course, but it's used in some old synthesizers, which is of course why I bought some of these ICs.
How the tester worksThe way it works is with 3 sub tests:
- Blank check. This is done by filling the entire memory with 0000. Then it goes through the entire memory and makes sure all data read is 0000.
- Walking 1's test. This is a bit more messy. It starts at address 0 and writes 0001. It then goes through all the other addresses and makes sure it reads back 0000. Then it reads address 0 again and makes sure it gets 0001 back. Then it writes 0010 at address 0, goes through all the checks again... Then writes and checks 0100 and then 1000. After that, it writes to address 1 and writes 0001, etc... So it checks each bit on each memory location.
- Fill check. This is done by filling the entire memory with 1111. Then it goes through the entire memory and makes sure all data read is 1111.
Also, this thing was written in PIC assembly, because I like to torture myself. It ended up becoming 387 words of instructions and using 10 bytes of RAM. (Good thing there's room for 8k instructions...)
I wasn't dying to write more messy assembly to do some advanced tests :)
It takes around 12 seconds for the test to run.
The test only checks the IC operating at 5V. The IC is usually used with a battery for backup when the synthesizer is switched off. So, another test could perhaps included writing some data, dropping the supply voltage down to 2V (which is the lowest data retention voltage according to the datasheet), bringing it back up to 5V and verifying... but .. nah...
Development troubleI ran into some problems when developing this thing. Sometimes, it just stopped working and it took a while for me to figure out what was going on. Apparently my 20MHz oscillator that clocks the PIC wasn't stable (Hey, I'm not an engineer). So sometimes (like when I was putting my fingers near the oscillator) the PIC detected it lost the external clock and switched to its internal 4MHz clock. This fires an interrupt and you can handle this in the PIC and take some action if you want.
I'm not sure what the problem was in my case. I think it was just that I noticed that my error signal was blinking at different speeds sometimes and I had no idea how it could do that. I of course expected that it would always take the same amount of time to execute a certain codeblock.
Anyway, I added an indication for this so it will blink the LEDs in a strange way if the external clock signal is lost. This is because I want to test the RAM with the PIC running at 20MHz, not 4MHz. My code isn't optimized in any way, but at least running it in 20MHz should push the RAM a bit closer to the specs limits.
It takes 4 clock cycles to execute 1 instruction, so at 20MHz that's 5M instructions per seconds, or every 200ns. The TC55APL-3 has tAccess of max 300ns. Since it takes two instructions to toggle the CE-pin, or 400ns, this should be an OK speed to test at.
If the PIC had been running at 4MHz it would have taken 2us to toggle the CE-pin, which isn't really pushing the RAM close to the specs. That's why I wanted to make sure it was using the external clock!
The internal clock CAN be set to 8MHz (4MHz is default) so that would cause the CE-pin toggle to take 1us instead, but that's still quite slow considering that the RAM is speced to handle 300ns read access.
ConclusionSo, I have a tester and 20 working ICs.
But, perhaps more importantly, I have finished a project